Update prints to use correct format specifier for 32bit variables

Signed-off-by: Nandanikhil Gajulapally <nandanikhil.gajulapally@amd.com>

Acked-for-series: Sreedhar Kundella <sreedhar.kundella@amd.com>

Edited the dependencies.prop to remove the import option for self_test example design.

Signed-off-by: nishantd <nishant.dhonde@xilinx.com>

1.Server support is added to send total frames in CRAM for a given
row in SSIT devices.
2.Cleared the SEM CRC and ECC errors in PMC_ERR2_STATUS Register
since HWEAM path to handle these errors is unused so
CFRAM_SEU_CRC/ECC bits are setting once boot done.

Signed-off-by: GayathriM <gayathri.m@amd.com>

To optimize MH signature, we have a circular dependency with IHT
signature(which is part of AC) while calculating MH signature(i.e., MH
Signature = RSA/ECDSA(SSK, SHA3(IHs, PHs, AC) || padding).
Fixed by removing IHT signature(which is part of AC) dependency for MH
signature calculation.
In case of Optimization, for MH hash calculation the authentication
Certificate will be (AC - IHT Signature).

Signed-off-by: Ankush Mehtre <ankush.mehtre@amd.com>
Acked-by: Bharath Mulagondla <Bharath.mulagondla@amd.com>

Modify pciepsu endpoint driver to support egress transfer.
Add required API's and example to support egress translation from PCIe
region to AXI.

Signed-off-by: Bhavana Jupalli <Bhavana.Jupalli@amd.com>

Changes in V3:
Update CR number.

Changes in V2:
Revert the mdd file version due to patch rejection.

Parameter KeySrc can be passed as a structure member in AES client API
instead of a seperate argument. That redundancy is removed.

Signed-off-by: VSSLakshmiPrasanna.Vutukuri <vsslakshmiprasanna.vutukuri@amd.com>
Acked-by: Harsha <harsha.harsha@xilinx.com>

Update srec_bootloader and srec_spi_bootloader applications to support Microblaze RISC-V
processor.

Signed-off-by: Paul Alvin <alvin.paulp@amd.com>
Acked-by: Srinivas Goud <srinivas.goud@amd.com>

Fix the MISRA-C rule 4.7 violation.

Problem: Calling XPm_SubsystemIdleCores without checking return value.

Solution: Check the return value after calling a non-void function.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Acked-by: Ronak Jain <ronak.jain@amd.com>

Fix doxygen warnings for trngpsv driver
and incremented library version to 1.5

Signed-off-by: Praveen Teja Kundanala <praveen.teja.kundanala@amd.com>
Acked-by: Harsha <harsha.harsha@xilinx.com>

Image selctor only check for persistant register for image selection
process but it does not have a validation check if boot bin really
exists in partition A or B of qspi flash offsets, this patch
addresses the issue by adding a validation check function.

Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com>
Acked-by: Sreedhar Kundella <sreedhar.kundella@amd.com>

…bedded applications

Update the lib dependencies based on xilstandalone instead of xiltimer.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

…ternal path

The external linker script can be configured using the USER_LINKER_SCRIPT
option/variable defined in the UserConfg.cmake. The default value of this
variable is $CMAKE_SOURCE_DIR/lscript.ld, but the template apps are not
using this variable. Update the template apps CMakeLists.txt to use this
variable.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

Add the support to split GPIO interrupts between multiple cpu cores.
With the current driver, a core will incorrectly clear an interrupt enabled
by another core because the driver does not handle which specific GPIOs are
masked to each core.
Add support to track which core enabled which GPIO interrupt and handles
the interrupts accordingly per cpu core.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Acked-by: Srinivas Goud <srinivas.goud@amd.com>

Provide the interrupt id from a array to XSetupInterruptSystem function.

Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>

Acked-for-series: Gaddipati, Naveen <naveen.gaddipati@amd.com>

Provide the interrupt id from a array to XSetupInterruptSystem
function.

Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>

Acked-for-series: Gaddipati, Naveen <naveen.gaddipati@amd.com>

C convention expects macros to be in all caps. To go with this, add versal
symbol to be all caps as well this define is missing in SDT flow.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

…n a function to support In-place PLM update

Moved initialization of HandlerTable of the IOModule instance and
XIOModule_BitPosMask array to XIOModule_HandlerTable_Initialize function
so that PLM can call this API to re-initialize them to default after
In-place PLM update where the driver and timer state are saved before
update is done and restored back when new PLM comes up.
This change is done to fix timestamp messup issue after In-place PLM
update.

Signed-off-by: Mounika Akula <mounika.akula@amd.com>

Acked-for-series: Bharath Mulagondla <Bharath.mulagondla@amd.com>

… PLM update

PLM timestamp is getting messed up after In-place PLM update as PLM is
writing the PIT counter values to its preload register. To fix this
issue, storing the IOModule instance before In-place update and skipping
the initialization of the IOModule driver.
Also, do not stop PIT3 timer during In-place PLM update.

Signed-off-by: Mounika Akula <mounika.akula@amd.com>

Acked-for-series: Bharath Mulagondla <Bharath.mulagondla@amd.com>

Change the format specifier to %08lx and add a cast UINTPTR for mac_baseaddr
to ensure proper printing.

Signed-off-by: Venkatesh Odela <venkatesh.odela@amd.com>
Acked-by: Harini Katakam <harini.katakam@amd.com>

Fixed doxygen warnings for xilloader

Signed-off-by: Harsha Harsha <harsha.harsha@amd.com>
Acked-by: Bharath Mulagondla <Bharath.mulagondla@amd.com>

To reduce the IPI calls from linux to PLM(Xilsecure) for initializing the AES engine,
Added AES init call inside the AES operation init.

Signed-off-by: Mounika Botcha <mounika.botcha@amd.com>
Acked-by: Kalyani Akula <Kalyani.akula@amd.com>

- In XPmNotifier_SendPendingNotifyEvent: A pointer should point to a const-qualified type whenever possible.

Signed-off-by: Trung tran <trung.tran@amd.com>

Acked-for-series: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>

- In XPm_Init: The precedence of operators within expressions should be made explicit.
- In AddPlDevice: Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category.
- In XPm_Init: Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category.
- In XPm_RequestHBMonDevice: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.

Signed-off-by: Trung tran <trung.tran@amd.com>

Acked-for-series: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>

- MISRA rules 4.9: A function should be used in preference to a function-like macro where they are interchangeable.
- To fix this violation, we replace PIN_FUNC macro by the actual
  function call.

Signed-off-by: Trung tran <trung.tran@amd.com>

Acked-for-series: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>

- The prototype XPmRepair_Laguna_vp1902 should only exist when build for
  XCVP1902.

Signed-off-by: Trung tran <trung.tran@amd.com>

Acked-for-series: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>

- MISRA rule 10.5: The value of an expression should not be cast to an inappropriate essential type.
- Solution: replace TRUE by 1U and False by 0U values

Signed-off-by: Trung tran <trung.tran@amd.com>

Acked-for-series: Buddhabhatti, Jay <jay.buddhabhatti@amd.com>

- Update the import example support for ZCU106 Rx only,
  vck190 pass through apps.

Signed-off-by: Katta Dhanunjanrao <katta.dhanunjanrao@amd.com>
Acked-by: Gaddipati, Naveen <naveen.gaddipati@amd.com>

Fixed yaml issues to support unified flow

Signed-off-by: Kunal Rane <kunal.rane@amd.com>

Acked-for-series: Gaddipati, Naveen <naveen.gaddipati@amd.com>

Updated correct GPIO number for the ZCU102 app
as well as updated IRQ number for HDMI TX.

Signed-off-by: Kunal Rane <kunal.rane@amd.com>

Acked-for-series: Gaddipati, Naveen <naveen.gaddipati@amd.com>

Fixed the error "Invalid escape sequence \N" by replacing the
paths backslash character with slash character.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Acked-by: Onkar Harsh <onkar.harsh@amd.com>

Existing logic treats interrupts as SPI or PPI based on
bit number 20th encoded in interrupt ID, if said bit is not
set interrupt is always treated as SPI and offset 32 will be
added to interrupt ID. This is breaking software generated
interrupts.

Update logic to allocate bit 22 in encoded interrupt ID for
SGI interrupt, and modify offset calculation logic accordingly.
If bit 22 is set, offset added to interrupt id will be 0.

For configuring software generated interrupts, user needs to
use following APIs to get encoded parent intc base address and encoded
interrupt ID,

       XGetEncodedIntcBaseAddr
       XGetEncodedIntrId

Encoded parent intc base address and interrupt ID needs to be
passed to XSetupInterruptSystem.

Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>

Acked-for-series: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

Update xscugic_example to make use of interrupt wrapper
APIs for invoking SGI, when application is build in SDT flow.

Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>

Acked-for-series: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

This reverts commit bc05038.

GCC I/O functions like printf is calling open/close
syscalls, add open/close hook functions to support
GCC I/O functions.

Signed-off-by: Mubin Sayyed <mubin.sayyed@amd.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>

…rong DDR value in linker

Lately, the linear SPI flashes have been removed from TOTAL_MEM_CONTROLLERS list
to avoid getting their entries in the memory tests config structure. With this,
the length of TOTAL_MEM_CONTROLLER may become 1 when the design has BRAM and
axi_emc in it, triggering this unused legacy condition. This unwanted condition
is leading to setting of linker sections to BRAM which in principle is correct
but different than that of classic flow and is set using the wrong approach.

Remove this out of context DDR variable setting to avoid such unwanted behavior.

Signed-off-by: Onkar Harsh <onkar.harsh@amd.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>

by using default sleep timer as TTC0, leading to failures in
TTCPS examples also causing peripheral tests to fail. This is
because we exclusively use the TTC0 instance in every example.
Update TTC3 instance as the default sleep timer, to prevent
potential failure cases.

Signed-off-by: M Lakshmaiah <lakshmaiah.m@amd.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>

Updated for openamp and libmetal

Signed-off-by: Kopparapu,Mounika <Mounika.Kopparapu@amd.com>

Acked-by : Siva Addepalli<saddepal@xilinx.com>

Updated for xiltimer and cpu_cortex_r5

Signed-off-by: Kopparapu,Mounika <Mounika.Kopparapu@amd.com>

Acked-by : Siva Addepalli<saddepal@xilinx.com>

The declaration for routines ScuGicSelfTestExample() and ScuGicInterruptSetup()
in scugic_header.h arent updated for SDT flow and this results in taking of
truncated baseaddress in SDT flow, hence correct the declarations for these
routines.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>

update Embedded SW license 2024.1 release

Signed-off-by: Manikanta Sreeram <manikanta.sreeram@amd.com>

Changelog updated with xilrsa

Signed-off-by: Kopparapu,Mounika <Mounika.Kopparapu@amd.com>

Acked-by : Siva Addepalli<saddepal@xilinx.com>

This is a fix for versal secure lockdown LPD error.
Signed-off-by: Sangshetty Patil <sangshetty.patil@amd.com>

Acked-by:Trung Tran<trungt@amd.com>

Added few more lines for xilloader

Signed-off-by: Kopparapu,Mounika <Mounika.Kopparapu@amd.com>

Acked-by : Siva Addepalli<saddepal@xilinx.com>

The xlnx,switchable parameter in YAML should be xlnx,switchable-int.
Otherwise if the xlnx,switchable is present in the device tree as
"true" or "false" it will cause compilation issues.

Signed-off-by: Conall O'Griofa <conall.ogriofa@amd.com>
Acked-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>

Updated changelogs for zynqmp_fsbl, zynqmp_pmufw, zynq_fsbl, imgsel
and img_rcvry apps

Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com>
Acked-by: Sreedhar Kundella <sreedhar.kundella@amd.com>

Deleted extra spaces

Update for dfemix, dfeccf, dfeequ, dfeofdm and dfeprach
changelog for 2024.1

Signed-off-by: Dragan Cvetic <dragan.cvetic@amd.com>

Acked-by : Siva Addepalli<saddepal@xilinx.com>

This reverts commit bb86e16.

XRAM AXI-lite configuration is not supported in Vivado for VE2302 and VM1102
ES1 devices. Add a workaround to skip AXI-lite enablement on these devices.

Signed-off-by: Nicole Baze <amanda.baze@amd.com>

Acked-by:Trung Tran<trungt@amd.com>

A lot of people are trying to send pull requests via github but this is not
the right channel to use. Linux project is doing review over emails that's
why use git@xilinx.com if you want to contribute changes to this
repository.

Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>

Signed-off-by: Bhawana Sahu <bhawana.sahu@amd.com>

…me IP instance